LatticeECP3 Evaluation Boards & Demos

Development Kits & Evaluation Boards

In order to accelerate your design development, Lattice offers a choice of development kits & boards to support LatticeECP3 designs. The development kits & boards enable you to evaluate the benefits of the LatticeECP3 devices capabilities in a lab setting.

The LatticeECP3 PCI Express Development Kit offers a complete hardware/software development environment to evaluate PCI Express technology and accelerate design and development using the LatticeECP3.  The kit includes LatticeECP3 PCI Express x1/x4 Solutions Board USB download cable Demo CDs for Windows and Linux ispLEVER with a 60-day license (Windows or Linux)
The LatticeECP3 AMC evaluation board & AMC interface card provides a platform to evaluate Serial RapidIO 2.1 solutions
The LatticeECP3 Serial Protocol board [EN] provides a platform to evaluate DDR2 memory interface PCI express Gigabit ethernet	[EN]
The LatticeECP3 I/O Protocol board & ADC-DAC interface card [EN] provides a platform to evaluate DDR3 memory interface SPI4.2 ADC/DAC interfaces	[EN]
The LatticeECP3 Video Protocol board [EN] provides a platform to evaluate SMPTE 7:1 LVDS	[EN]
Tachyssema PF120 Platform with HV3 Module for LatticeECP3 [EN]	[EN]

Demos

• LatticeECP3 PCI Express Demo [EN]: The demo has been designed to demonstrate a x1 PCI Express link between two ports with the Lattice PCI Express Root Complex Lite and PCI Express Endpoint IP cores using two LatticeECP3 I/O Protocol Board.
• LatticeECP3 DDR3 Demo [EN]: The demo has been designed to demonstrates the functionality of the Lattice DDR3 IP core at a speed of 400 MHz (800 Mbps) using the LatticeECP3 I/O Protocol Board.
• LatticeECP3 XAUI Demo [EN]: The demo has been designed to demonstrate the performance of the LatticeECP3 PCS in XAUI mode at 3.125 Gbps
• LatticeECP3 CPRI Demo [EN]: The demo has been designed to demonstrate the performance of the LatticeECP3 PCS with the CPRI IP core at 1.228/2.457/3.072 Gbps.
• LatticeECP3 Tri-rate SMPTE SDI Demo [EN]: This demo shows the capability of the LatticeECP3™ SERDES with an SD/HD/3G design example. The design is implemented using the LatticeECP3 SMPTE video evaluation board
  
• LatticeECP3 SerDes Eye/Backplane Demo [EN]: The LatticeECP3 SERDES Eye/Backplane demo demonstrates the performance of the LatticeECP3 SERDES I/O at 3.125 Gbps
• LatticeECP3 7:1 LVDS Demo: The LatticeECP3 7:1 LVDS demo includes two tests - 1) a simple loopback test that illustrates the use of the 7:1 transmitter and 7:1 receiver and 2) a video processing design that brings video data into the FPGA device through the 7:1 receiver, processes it and transmits it out via the 7:1 transmitter